This invention relates, in general, to field effect transistors, and more particularly, to field effect transistors having multiple vertically aligned channels.
Compound semiconductor based heterostructure devices have been predicted to offer significant speed and power advantages over silicon devices. Most compound semiconductor based HFET designs attempt to roughly duplicate silicon based structures using compound semiconductor materials. One disadvantage of this approach is that advantageous properties of the compound semiconductor materials are not fully used and minimum device geometries are unimproved over silicon counterparts. Because gallium arsenide chips are not substantially smaller than silicon based devices, they are not cost competitive with conventional CMOS technology. What is needed is a truly compact, high performance complementary heterojunction field effect transistor structure using compound semiconductor materials.
Power efficient semiconductor devices, such as silicon CMOS devices, use both N-channel and P-channel devices. A problem with conventional HFET structures is a mismatch in P-channel and N-channel threshold voltage and operating characteristics. Mismatch between N-channel and P-channel devices complicated processing and made circuits using the devices more complex. A complementary HFET with closely matched operating characteristics and high packing density is needed.